The present invention relates to the provision of an improved semiconductor device and techniques for making such a device. More particularly, but not exclusively, the present invention relates to the formation of shallow semiconductor junctions for such devices.
To increase the speed of electronic devices, it is often desirable to decrease the critical dimension of various semiconductor components. Concomitantly, functionality of many integrated circuit devices may be increased by reducing the size of individual components so that the component density, and correspondingly the number and complexity of integrated circuits formed from the components may be increased. Also, as the critical dimension of semiconductor devices is scaled down into the submicron range, it is often desirable to maintain a shallow, tightly distributed junction profile. Unfortunately, conventional processing often exposes junction forming dopants to multiple, high temperature thermal cycles that tend to deepen the corresponding profile. Consequently, there is a demand for better techniques to maintain a desired junction profile depth. Moreover, for semiconductor devices having a critical dimension deep in the submicron range (.ltoreq.0.2 microns) the formation of correspondingly shallower junctions is often desired and the maintenance of such profiles often becomes even more significant for proper device performance. Thus, there is also a need for techniques to reliably provide shallower semiconductor junctions.